Micron HBM3E 36GB 8-High Stack

The Micron HBM3E 36GB 8-High Stack (MT62F3G32D8DV-026) represents Micron's third-generation High Bandwidth Memory implementation, built on the HBM3E JEDEC standard and manufactured using Micron's advanced 1β (1-beta) DRAM process node. The 8-Hi stacked architecture integrates nine dies — one base logic die plus eight DRAM dies — interconnected through thousands of through-silicon vias (TSVs), delivering extreme memory bandwidth and capacity in a compact 2.5D integration footprint suitable for advanced packaging substrates. With a 1024-bit wide interface per stack and a per-pin data rate of 9.6 Gbps, each stack delivers up to 1.2 TB/s of memory bandwidth, making it among the highest-bandwidth DRAM products commercially available.

Designed for direct integration into AI accelerator modules, the MT62F3G32D8DV-026 is a primary memory component in NVIDIA's H200 Tensor Core GPU, where multiple stacks operate in parallel to service the massive parallelism of transformer-based large language model inference and training workloads. The HBM3E specification introduces improvements over HBM3 in per-pin data rate, capacity per stack, and power efficiency, supporting higher throughput per watt — a critical metric in high-density data center GPU pods where thermal and power budgets are tightly constrained. The 36GB capacity per stack enables GPU configurations that exceed 140GB of total HBM capacity, directly expanding the size of models and datasets that can reside in on-accelerator memory without spilling to slower off-chip storage.

Enterprise deployments of accelerators equipped with the MT62F3G32D8DV-026 benefit from Micron's focus on reliability and signal integrity at extreme data rates. The device operates over a nominal supply voltage compatible with modern interposer-based 2.5D packaging and is validated for the continuous, sustained-throughput demands of production AI inference clusters, HPC simulation environments, and scientific computing installations. As a component soldered onto GPU substrates rather than a user-replaceable module, this memory stack is specified and qualified at the system level by GPU, with Micron supplying it as a critical semiconductor ingredient to the AI infrastructure supply chain.

Ideal for

• Large language model (LLM) training on GPU clusters where model weight tensors must reside entirely in high-bandwidth on-accelerator memory to sustain peak matrix-multiply throughput
• High-throughput generative AI inference serving, where low per-token latency depends on rapid, repeated access to multi-billion-parameter model weights stored across HBM stacks
• High-performance computing (HPC) workloads such as molecular dynamics simulation, climate modeling, and computational fluid dynamics that are bandwidth-bound and benefit from >1 TB/s memory throughput
• Recommender system training and inference in hyperscale data centers where embedding tables and feature vectors require both large memory capacity and high random-access bandwidth
• Computer vision and multimodal AI model training involving large activation tensors and high-resolution feature maps that saturate conventional GDDR or DDR memory subsystems
• Scientific data analytics and seismic processing pipelines in energy and research sectors that require sustained memory bandwidth across very large floating-point datasets

Technical specifications

Available from Omnixon Global. Submit an RFQ and our team will confirm configuration and availability for your order.