Brand: Samsung | Category: Memory (RAM)
SKU: SAMS-K4DAH8H05MMCQR | Part #: K4DAH8H05M-MCQR | MPN: K4DAH8H05M-MCQR
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The Samsung HBM3E 12-High 36GB is a High Bandwidth Memory third-generation extended specification module built on a 12-layer DRAM die stack, representing the highest-capacity single HBM3E package Samsung has produced as of 2025. Each package integrates 36GB of capacity through 12 stacked dies interconnected via through-silicon vias (TSVs) and micro-bumps, delivering aggregate memory bandwidth exceeding 1.2TB/s per stack. The architecture leverages Samsung's advanced 1c-nm DRAM process node to achieve an optimal balance of density, power efficiency, and signal integrity, making it the preferred memory solution for next-generation AI training accelerators, HPC processors, and custom AI ASICs where memory bandwidth is the primary system bottleneck.
HBM3E 12-High targets AI infrastructure deployments where the transition from HBM3 to HBM3E provides measurable gains in large language model (LLM) training throughput, multi-modal model inference, and scientific simulation workloads. The increased per-stack capacity of 36GB — up from the 24GB available in 8-high HBM3E configurations — allows AI accelerator designers to reduce the total package count on a substrate while maintaining or increasing total system memory capacity, directly benefiting thermal design and PCB routing density. This makes it especially valuable for chiplet-based accelerator designs integrating multiple compute dies with a shared HBM stack in a 2.5D or 3D package architecture.
Samsung engineered the HBM3E 12-High with enhanced ECC schemes across all 1024-bit wide bus channels to maintain data integrity under sustained high-bandwidth access patterns typical in transformer model matrix multiplications. The product complies with JEDEC HBM3E specifications and is compatible with advanced packaging platforms including CoWoS, Foveros, and SoIC, ensuring broad ecosystem integration with leading AI accelerator silicon from hyperscaler and merchant silicon vendors alike. Launched in Q2 2025, the 12-High variant positions Samsung at the forefront of the HBM supply chain for the next wave of 600W-class AI accelerator products.
| Manufacturer | Samsung |
| Product Name | HBM3E 12-High 36GB |
| Memory Standard | JEDEC HBM3E |
| Stack Configuration | 12-High (12 DRAM dies per stack) |
| Capacity per Stack | 36 GB |
| DRAM Process Node | Samsung 1c-nm |
| Bus Width | 1024-bit (per stack) |
| Number of Channels per Stack | 16 independent channels |
| Bits per Channel | 64-bit |
| Memory Bandwidth (per stack) | >1.2 TB/s |
| Data Rate | >2.4 Gbps per pin |
| Operating Voltage (VDD) | 1.05 V nominal |
| Die Interconnect Technology | Through-Silicon Via (TSV) with micro-bump bonding |
| Interface Type | HBM3E PHY (2.5D/3D package integration) |
| Compatible Packaging Platforms | CoWoS (Chip-on-Wafer-on-Substrate), Foveros, SoIC, EMIB |
| ECC | Advanced on-die ECC with SEC-DED across all channels |
| Operating Temperature Range | 0°C to 95°C junction (Tj) |
| Typical Power Consumption | Approximately 10–15 W per stack at peak bandwidth (workload dependent) |
| Form Factor | HBM3E bare-die stack for 2.5D/3D substrate integration |
| Target Applications | AI Training Accelerators, HPC Processors, AI Inference ASICs, Custom Silicon |
| Launch Date | Q2 2025 |
| Compliance | JEDEC JESD238 (HBM3E) specification compliant |
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| Brand | Samsung |
| Category | Memory (RAM) |
| SKU | SAMS-K4DAH8H05MMCQR |
| Part Number | K4DAH8H05M-MCQR |
| Condition | New |
| Product Name | HBM3E 12-High 36GB |
| Memory Standard | JEDEC HBM3E |
| Stack Configuration | 12-High (12 DRAM dies per stack) |
| Capacity per Stack | 36 GB |
| DRAM Process Node | Samsung 1c-nm |
| Bus Width | 1024-bit (per stack) |
| Number of Channels per Stack | 16 independent channels |
| Bits per Channel | 64-bit |
| Memory Bandwidth (per stack) | >1.2 TB/s |
| Data Rate | >2.4 Gbps per pin |
| Operating Voltage (VDD) | 1.05 V nominal |
| Die Interconnect Technology | Through-Silicon Via (TSV) with micro-bump bonding |
| Interface Type | HBM3E PHY (2.5D/3D package integration) |
| Compatible Packaging Platforms | CoWoS (Chip-on-Wafer-on-Substrate), Foveros, SoIC, EMIB |
| ECC | Advanced on-die ECC with SEC-DED across all channels |
| Operating Temperature Range | 0°C to 95°C junction (Tj) |
| Typical Power Consumption | Approximately 10–15 W per stack at peak bandwidth (workload dependent) |
| Form Factor | HBM3E bare-die stack for 2.5D/3D substrate integration |
| Target Applications | AI Training Accelerators, HPC Processors, AI Inference ASICs, Custom Silicon |
| Launch Date | Q2 2025 |
| Compliance | JEDEC JESD238 (HBM3E) specification compliant |
The Samsung HBM3E 12-High 36GB Memory is enterprise server memory designed for ECC-protected workloads — virtualization hosts, database servers, analytics platforms, and AI training rigs. Samsung validates this module against major server vendor compatibility matrices.
Key specifications for the Samsung HBM3E 12-High 36GB Memory: new condition; manufacturer Samsung; product name HBM3E 12-High 36GB; memory standard JEDEC HBM3E; stack configuration 12-High (12 DRAM dies per stack); capacity per stack 36 GB; dram process node Samsung 1c-nm. Manufacturer part number K4DAH8H05M-MCQR. For the full datasheet with electrical, environmental, and compliance details, contact our pre-sales engineering team.