Samsung CXL Memory Module Box (CMM-B) 2TB

The Samsung CXL Memory Module Box (CMM-B) 2TB is a purpose-built, rack-mounted memory expansion enclosure that attaches to host servers over the Compute Express Link (CXL) 2.0 protocol, enabling true memory pooling and disaggregation beyond the DIMM slot limitations of standard server motherboards. By exposing a massive 2TB memory pool as coherent, byte-addressable capacity to one or more CXL-capable host CPUs, the CMM-B allows modern AI inference engines, in-memory databases, and high-performance computing nodes to access far greater working set sizes than local DRAM alone can provide. The enclosure integrates Samsung's proprietary DRAM modules with an onboard CXL memory controller, delivering low-latency access that is competitive with local DDR5 while adding the architectural flexibility of shared or pooled deployment models.

The CMM-B is engineered for the demands of generative AI serving clusters, large language model (LLM) inference, real-time analytics, and scientific simulation workloads where memory capacity is the primary bottleneck. Its CXL Type 3 device classification allows the memory to be mapped into a host's physical address space through standard PCIe 5.0 x16 host interfaces, meaning existing software stacks require minimal modification to leverage the expanded capacity. Samsung's enterprise-grade reliability features, including full ECC across all memory ranks and advanced thermal management within the enclosed chassis, ensure data integrity and continuous operation in 24/7 data center environments.

What makes the CMM-B particularly notable in the 2025 data center landscape is its role as a foundational building block for composable infrastructure. Multiple CMM-B units can be pooled across a CXL fabric switch, enabling dynamic memory allocation between compute nodes without physical reconfiguration. This disaggregated architecture reduces stranded memory capacity, lowers total infrastructure footprint for memory-intensive workloads, and provides a migration path from traditional NUMA-bound server designs toward the software-defined memory tiering that next-generation AI supercomputing platforms demand.

Ideal for

• Large language model (LLM) inference serving: expanding the KV-cache and model weight memory far beyond server DIMM slot capacity to support larger context windows and higher concurrency
• In-memory database scaling: providing Oracle, SAP HANA, or Redis deployments with multi-terabyte coherent memory pools accessible with near-DRAM latency without scaling out server nodes
• HPC simulation workloads: supplying computational fluid dynamics, molecular dynamics, and finite element analysis jobs with the contiguous memory address space required for massive working sets
• AI training checkpointing and activation storage: offloading intermediate activation tensors and optimizer states to CXL memory to free GPU HBM for compute-critical operations
• Composable data center infrastructure: dynamically re-allocating pooled memory across multiple CXL-fabric-connected compute nodes based on workload demand using software orchestration
• Real-time analytics and streaming data processing: enabling Apache Spark, Flink, or proprietary in-memory analytics engines to maintain entire operational datasets in a single coherent memory tier

Technical specifications

Available from Omnixon Global. Submit an RFQ and our team will confirm configuration and availability for your order.