Broadcom BCM58800 Stingray PS250 Smart NIC / DPU

The Broadcom BCM58800 Stingray PS250 is a programmable Smart NIC and Data Processing Unit (DPU) built on Broadcom's 16nm BCM58800 SoC, integrating eight high-performance Arm Cortex-A72 processor cores with a 25GbE dual-port SFP28 network interface. The architecture combines a full-featured network offload engine with an on-chip PCIe Gen3 x8 host interface, enabling the device to function simultaneously as a high-throughput NIC and an independent compute platform capable of running a dedicated Linux environment. This design allows infrastructure workloads — security processing, storage virtualization, network function execution — to be offloaded from the host CPU entirely, freeing server resources for application workloads.

The PS250 is engineered for infrastructure offload in hyperscale and enterprise datacenter environments. Its integrated SmartNIC capabilities encompass hardware-accelerated RDMA over Converged Ethernet (RoCE), stateless offloads (TSO, LRO, RSS, checksum), and a programmable packet processing pipeline. The SFP28 dual-port interface supports 25GbE line-rate throughput per port, with native support for 10GbE and 1GbE link speeds, making it compatible with existing cabling and switch infrastructure. The BCM58800 SoC also incorporates a hardware-based security accelerator supporting cryptographic operations including AES, SHA, and PKA engines, enabling TLS/IPsec offload without consuming host CPU cycles.

Targeted at AI infrastructure, NVMe-oF storage acceleration, software-defined networking, and zero-trust security enforcement at the network edge, the PS250 is a production-grade DPU suitable for deployment in rack servers, hyper-converged infrastructure nodes, and edge compute platforms. It is fully supported under standard Linux environments via open-source drivers and integrates with frameworks including DPDK and OpenStack, supporting both baremetal and virtualized deployment models. The PS250 ships in a standard PCIe low-profile form factor, ensuring compatibility with modern 1U and 2U server chassis across leading platforms.

Ideal for

• NVMe-oF storage target and initiator offload — the integrated Arm cores and RDMA acceleration enable the PS250 to terminate NVMe-over-Fabrics sessions in hardware, reducing host CPU overhead in all-flash and software-defined storage deployments
• IPsec and TLS encryption offload for zero-trust network architectures — hardware crypto engines perform bulk encryption and key exchange operations independently of the host, enabling line-rate encrypted east-west traffic without server CPU penalty
• Software-defined networking and NFV acceleration — DPDK-compatible packet processing and SR-IOV support allow the PS250 to run virtual network functions such as virtual firewalls, load balancers, and vSwitches directly on the DPU's Arm cores
• AI and GPU cluster network offload — in GPU server nodes supporting AI training workloads, the PS250 handles collective communication primitives and RoCE transport offload, reducing latency and freeing GPU interconnect bandwidth
• Hypervisor and cloud infrastructure isolation — by hosting the virtual switch, virtual router, and management plane on the DPU's independent processor complex, operators enforce strict isolation between tenant workloads and infrastructure control functions
• Edge compute and telco NFV — the low-power, PCIe-attached form factor and programmable pipeline make the PS250 suitable for deployment in edge nodes requiring local traffic steering, security enforcement, and compute offload within constrained power envelopes

Technical specifications

Available from Omnixon Global. Submit an RFQ and our team will confirm configuration and availability for your order.