Intel Xeon 6960P (Granite Rapids, 72-core)

The Intel Xeon 6960P is the premier high-frequency member of the Granite Rapids generation, built on Intel's advanced Intel 3 process node and featuring 72 performance-optimized P-cores arranged across a multi-tile architecture. Unlike the efficiency-focused E-core Xeon 6 variants, the 6960P concentrates on maximizing single-thread and per-core computational bandwidth, making it ideal for workloads where both core count and clock speed must coexist at scale. The processor integrates up to 504 MB of Intel On-Chip Cache (L3), providing deep data locality for latency-sensitive analytics and in-memory processing tasks. Support for DDR5-6400 across 12 memory channels per socket delivers exceptional memory bandwidth exceeding 500 GB/s, critical for data-intensive scientific and enterprise applications.

Granite Rapids introduces the Intel Advanced Performance Extensions (APX) instruction set alongside enhanced AMX (Advanced Matrix Extensions) with BF16 and INT8 support, enabling accelerated AI inference and matrix-heavy workloads directly on the CPU without requiring discrete accelerators. The architecture improves upon Sapphire Rapids in IPC (instructions per clock) through redesigned execution ports, larger mid-level caches, and improved prefetch logic. PCIe 5.0 lane counts reach up to 96 lanes per socket, enabling high-throughput NVMe storage fabrics, high-speed networking, and GPU or accelerator attachment at full bandwidth without lane contention.

The Xeon 6960P launched in Q1 2025 and targets two-socket enterprise server platforms certified by major brands. Its core count and frequency balance make it uniquely positioned for per-core licensed software environments—including Oracle Database and SAP HANA—where organizations pay per physical or logical core and require maximum throughput from each licensed unit. HPC workloads in computational fluid dynamics, genomics, and financial risk modeling also benefit from the combination of wide SIMD (AVX-512 with two execution units per core), massive cache hierarchy, and high memory bandwidth.

Ideal for

• Oracle Database and other per-core licensed RDBMS deployments where maximizing throughput per licensed core reduces total software spend
• SAP HANA in-memory analytics requiring high single-socket memory bandwidth and large DDR5 capacity across 12 channels
• High-performance computing clusters running computational fluid dynamics, molecular dynamics, or climate modeling simulations leveraging AVX-512 and AMX
• Financial services risk analytics and real-time Monte Carlo simulations demanding both high core counts and strong per-core clock performance
• AI inference serving on CPU for latency-sensitive applications using AMX BF16/INT8 acceleration without discrete GPU dependency
• Genomics and bioinformatics pipelines processing large reference datasets that benefit from the 504 MB on-chip cache reducing DRAM access latency

Technical specifications

Available from Omnixon Global. Submit an RFQ and our team will confirm configuration and availability for your order.