Brand: Broadcom | Category: Network Switches
SKU: BROA-PEX9749AA80BIG | Part #: PEX9749-AA80BIG | MPN: PEX9749-AA80BIG
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The Broadcom PEX9749 is a PCIe 4.0 x16 switch chip delivering 48 lanes of switching capacity designed for enterprise AI and HPC infrastructure builds requiring GPU interconnect and NVMe-oF disaggregated storage topologies. The silicon supports non-blocking, low-latency packet switching across multiple high-speed PCIe 4.0 connections, enabling efficient pooling of compute and storage resources in hyperscale data center environments. With full PCIe 4.0 compliance and optimized latency profiles, the PEX9749 addresses the critical bottleneck of inter-device communication in GPU-centric and storage-intensive workloads.
The chip architecture integrates advanced switching fabric with support for hot-plug operations, dynamic reconfiguration, and transparent PCIe bridging. It accommodates complex multi-GPU training clusters and NVMe-oF fabric deployments where aggregate bandwidth and deterministic performance are non-negotiable. The PEX9749 launched in Q1 2024, targeting the rapid expansion of AI infrastructure builds requiring purpose-built interconnect silicon beyond standard motherboard topologies.
Broadcom's implementation includes enhanced error detection, power-efficient switching logic, and support for virtualization pass-through models. The chip integrates thermal management features suitable for dense rack-level deployments and operates within enterprise-grade environmental specifications for mission-critical infrastructure.
| Manufacturer | Broadcom |
| Model | PEX9749 |
| Product Category | PCIe Switch Chip |
| PCIe Generation | PCIe 4.0 |
| Total Lane Count | 48 lanes |
| Port Configuration | Up to 4x PCIe x16 or equivalent multi-port switching configuration |
| Aggregate Bandwidth | 192 GB/s (per direction, full-duplex switching fabric) |
| Switching Architecture | Non-blocking, low-latency crossbar switch fabric |
| Latency Profile | Sub-microsecond internal switching latency |
| Virtualization Support | PCIe SR-IOV, ATS (Address Translation Services), PRI (Page Request Interface) |
| Hot-Plug Capability | Full PCIe hot-plug and dynamic reconfiguration support |
| Error Detection | ECRC (End-to-End CRC), AER (Advanced Error Reporting), Parity protection |
| Power Consumption | Typical operating power <25W (full fabric utilization) |
| Thermal Management | Integrated thermal throttling, wide operating temperature range |
| Package Type | BGA (Ball Grid Array), enterprise-grade thermal design |
| Operating Temperature Range | 0–70°C |
| Manufacturing Process | Advanced CMOS process node optimized for low-latency switching |
| Compliance Standards | PCI Express 4.0 Base Specification, JEDEC thermal guidelines |
| Debug & Monitoring | SMBus management interface, in-band error logging, LED indicator support |
| Form Factor Compatibility | Suitable for PCIe switch card and modular fabric appliance form factors |
| Launch Date | Q1 2024 |
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| Brand | Broadcom |
| Category | Network Switches |
| SKU | BROA-PEX9749AA80BIG |
| Part Number | PEX9749-AA80BIG |
| Condition | New |
| Model | PEX9749 |
| Product Category | PCIe Switch Chip |
| PCIe Generation | PCIe 4.0 |
| Total Lane Count | 48 lanes |
| Port Configuration | Up to 4x PCIe x16 or equivalent multi-port switching configuration |
| Aggregate Bandwidth | 192 GB/s (per direction, full-duplex switching fabric) |
| Switching Architecture | Non-blocking, low-latency crossbar switch fabric |
| Latency Profile | Sub-microsecond internal switching latency |
| Virtualization Support | PCIe SR-IOV, ATS (Address Translation Services), PRI (Page Request Interface) |
| Hot-Plug Capability | Full PCIe hot-plug and dynamic reconfiguration support |
| Error Detection | ECRC (End-to-End CRC), AER (Advanced Error Reporting), Parity protection |
| Power Consumption | Typical operating power <25W (full fabric utilization) |
| Thermal Management | Integrated thermal throttling, wide operating temperature range |
| Package Type | BGA (Ball Grid Array), enterprise-grade thermal design |
| Operating Temperature Range | 0–70°C |
| Manufacturing Process | Advanced CMOS process node optimized for low-latency switching |
| Compliance Standards | PCI Express 4.0 Base Specification, JEDEC thermal guidelines |
| Debug & Monitoring | SMBus management interface, in-band error logging, LED indicator support |
| Form Factor Compatibility | Suitable for PCIe switch card and modular fabric appliance form factors |
| Launch Date | Q1 2024 |